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	<title>NSF Medium Practical and Efficient Accelerators with High-Frequency Chiplets ($1000K)</title>
	
	<description>NSF grant with Scott Beamer and Baris Taskin on High-Frequency
	</description>
	
	
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        <pubDate>Tue, 15 Jul 2025</pubDate>
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	<title>Amazon Research Award for Verification Constrained Hardware Optimization using Intelligent Design Agentic Programming ($100K)</title>
	
	<description>Amazong Research Award
	</description>
	
	
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        <pubDate>Sun, 01 Jun 2025</pubDate>
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	<title>New Paper: Beyond Verilog: Agents for Emerging HDLs</title>
        
          <link>docs/coins25.pdf</link>
        
	<description>Farzaneh Rabiei Kashanaki, Mark Zakharov, Jose Renau. 2025 IEEE International Conference on Omni-Layer Intelligent Systems (<strong>COINS</strong>), August 2025.</description>
	
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        <pubDate>Mon, 04 Aug 2025</pubDate>
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	<title>Google Academic Award for Building and Evaluating Hardware Agents ($100K)</title>
	
	<description>Google Academic Research Award
	</description>
	
	
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        <pubDate>Tue, 01 Oct 2024</pubDate>
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	<title>New Paper: HDLEval Benchmarking LLMs for Multiple HDLs</title>
        
          <link>docs/islad24_hdeval.pdf</link>
        
	<description>Mark Zakharov, Farzaneh Rabiei Kashanaki, Jose Renau. The First IEEE International Workshop on LLM-Aided Design (<strong>ISLAD</strong>), July 2024.</description>
	
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        <pubDate>Sat, 01 Jun 2024</pubDate>
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	<title>New Paper: LLM Challenges Fixing Verilog Testbenches</title>
        
          <link>docs/islad24_llmfix_poster.pdf</link>
        
	<description>Mark Zakharov, Farzaneh Rabiei Kashanaki, Alex Lee, Milind Varma, Jose Renau. The First IEEE International Workshop on LLM-Aided Design (<strong>ISLAD poster</strong>), July 2024.</description>
	
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        <pubDate>Sat, 01 Jun 2024</pubDate>
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	<title>New Paper: RETROSPECTIVE: Power model validation through thermal measurements</title>
        
          <link>docs/isca_retrospective23.pdf</link>
        
	<description>Jose Renau. ISCA@50 25-Year retrospective 1996-2020 (<strong>ISCA Retrospective</strong>), July 2023.</description>
	
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        <pubDate>Thu, 01 Jun 2023</pubDate>
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	<title>New Paper: A Multi-threaded Fast Hardware Compiler for HDLs</title>
        
          <link>docs/cc2023_livehd.pdf</link>
        
	<description>Sheng-Hong Wang, Hunter Coffman, Kenneth Mayer, Sakshi Garg, and Jose Renau. International Conference on Compiler Construction (<strong>CC</strong>), February 2023.</description>
	
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        <pubDate>Sat, 25 Feb 2023</pubDate>
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	<title>New Paper: Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation</title>
        
          <link>docs/micro21.pdf</link>
        
	<description>Nursultan Kabylkas, Tommy Thorn (Esperanto Technologies), Shreesha Srinath (Intel), Polychronis Xekalakis (Nvidia), and Jose Renau. 54th International Symposium on Microarchitecture (<strong>MICRO</strong>), October 2021.</description>
	
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        <pubDate>Fri, 10 Sep 2021</pubDate>
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	<title>New Paper: Design Decisions in LiveHD for HDLs Compilation</title>
        
          <link>docs/latte21.pdf</link>
        
	<description>Sheng-Hong Wang and Jose Renau, 1st Workshop on Languages, Tools, and Techniques for Accelerator Design (<strong>LATTE</strong>), April 2021.</description>
	
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        <pubDate>Thu, 01 Apr 2021</pubDate>
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	<title>New Paper: Load Driven Branch Predictor (LDBP)</title>
        
          <link>https://arxiv.org/abs/2009.09064</link>
        
	<description>Akash Sridhar, Nursultan Kabylkas, Jose Renau, (<strong>arvix</strong>), September 2020.</description>
	
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        <pubDate>Thu, 01 Oct 2020</pubDate>
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	<title>New Paper: Live Hardware Development at UCSC</title>
        
          <link>https://youtu.be/Dip5kkXxevs</link>
        
	<description>Jose Renau, Red Hat Research US 2020 (<strong>Talk</strong>), September 2020.</description>
	
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        <pubDate>Tue, 01 Sep 2020</pubDate>
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	<title>New Paper: LiveHD: A Productive Live Hardware Development Flow</title>
        
          <link>docs/ieeemicro20.pdf</link>
        
	<description>Sheng-Hong Wang, Rafael T. Possignolo, Haven Blake Skinner, and Jose Renau, IEEE Micro magazine (<strong>MICRO Magazine</strong>), June 2020.</description>
	
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        <pubDate>Mon, 01 Jun 2020</pubDate>
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	<title>New Paper: LiveSim: A Fast Hot Reload Simulator</title>
        
          <link>docs/ispass20.pdf</link>
        
	<description>Haven Skinner, Rafael T. Possignolo, Sheng-Hong Wang, and Jose Renau, International Symposium on Performance Analysis of Systems and Software (<strong>ISPASS</strong>), April 2020.</description>
	
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        <pubDate>Wed, 01 Apr 2020</pubDate>
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	<title>New Paper: LGraph: A Unified Data Model and API for Productive Open-Source Hardware Design</title>
        
          <link>docs/woset19a.pdf</link>
        
	<description>Sheng-Hong Wang, Rafael T. Possignolo, Qian Chen, Rohan Ganpati, and Jose Renau, Second Workshop on Open-Source EDA Technology (<strong>WOSET</strong>), November 2019.</description>
	
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        <pubDate>Fri, 01 Nov 2019</pubDate>
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	<title>New Paper: LNAST: A Language Neutral Intermediate Representation for Hardware Description Languages</title>
        
          <link>docs/woset19b.pdf</link>
        
	<description>Sheng-Hong Wang, Akash Sridhar, and Jose Renau, Second Workshop on Open-Source EDA Technology (<strong>WOSET</strong>), 2019.</description>
	
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        <pubDate>Fri, 01 Nov 2019</pubDate>
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	<title>A Productive Open Source Hardware Development Flow</title>
	
	<description>ARMY grant with Scott Beamer
	</description>
	
	
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        <pubDate>Sun, 01 Sep 2019</pubDate>
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	<title>New Paper: EMI Architectural Model and Core Hopping</title>
        
          <link>docs/micro19.pdf</link>
        
	<description>Daphne I. Gorman, Rafael T. Possignolo, and Jose Renau. 52th International Symposium on Microarchitecture (<strong>MICRO</strong>), October 2019.</description>
	
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        <pubDate>Tue, 10 Sep 2019</pubDate>
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	<title>New Paper: SMatch: Structural Matching for Fast Resynthesis in FPGAs</title>
        
          <link>docs/dac19.pdf</link>
        
	<description>Rafael T. Possignolo, and Jose Renau, Design Automation Conference (<strong>DAC</strong>), June 2019.</description>
	
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        <pubDate>Sat, 01 Jun 2019</pubDate>
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	<title>New Paper: Live Graph infrastructure for Synthesis and Simulation</title>
        
          <link>docs/lgraph19_latchup.pdf</link>
        
	<description>Jose Renau, Latch-Up conference (<strong>Latch-Up</strong>), May 2019.</description>
	
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        <pubDate>Wed, 01 May 2019</pubDate>
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	<title>New Paper: LGraph: A multi-language open-source database for VLSI</title>
        
          <link>docs/woset18.pdf</link>
        
	<description>Rafael T. Possignolo, Sheng Hong Wang, Haven Skinner, and Jose Renau. First Workshop on Open-Source EDA Technology (<strong>WOSET</strong>), November 2018.</description>
	
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        <pubDate>Wed, 10 Oct 2018</pubDate>
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	<title>CROSS funding</title>
	
	<description>CROSS grant for lgraph and fast simulation
	</description>
	
	
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        <pubDate>Thu, 01 Jun 2017</pubDate>
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	<title>New Paper: GPU NTC Process Variation Compensation with Voltage Stacking</title>
        
          <link>docs/tvlsi18.pdf</link>
        
	<description>Rafael T. Possignolo, Elnaz Ebrahimi, Ehsan Ardestani, Alamelu Sankaranarayanan, Jose Luis Briz, Jose Renau. IEEE Transactions on Very Large Scale Integration Systems (<strong>TVLSI</strong>), 2018.</description>
	
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        <pubDate>Fri, 01 Jun 2018</pubDate>
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	<title>New Paper: Automating the Area-Delay Trade-off Problem</title>
        
          <link>docs/carrv18.pdf</link>
        
	<description>Haven Skinner, Rafael T. Possignolo, and Jose Renau. Second Workshop on Computer Architecture Research with RISC-V (<strong>CARRV</strong>), June 2018.</description>
	
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        <pubDate>Sun, 10 Jun 2018</pubDate>
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	<title>New Paper: Architectural Opportunities for Novel Dynamic EMI Shifting (DEMIS)</title>
        
          <link>https://www.computer.org/csdl/mags/mi/2018/03/mmi2018030005.pdf</link>
        
	<description>Daphne I. Gorman, Jose Renau, and Matthew Guthaus. Top Picks Honorable Mention (<strong>Top Picks Honorable</strong>), May 2018.</description>
	
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        <pubDate>Thu, 10 May 2018</pubDate>
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	<title>New Paper: Securing Processors from Time Side Channels</title>
        
          <link>docs/amw18.pdf</link>
        
	<description>Jose Renau. The Asilomar Microcomputer Workshop, April 2018.</description>
	
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        <pubDate>Thu, 26 Apr 2018</pubDate>
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	<title>New Paper: Securing Processors from Time Side Channels</title>
        
          <link>docs/tleak.pdf</link>
        
	<description>Jose Renau. Open publication (<strong>Technical Report</strong>), April 2018.</description>
	
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        <pubDate>Wed, 04 Apr 2018</pubDate>
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	<title>New Paper: Automated Pipeline Transformations with Fluid Pipelines</title>
        
          <link>https://link.springer.com/chapter/10.1007/978-3-319-67295-3_6</link>
        
	<description>Rafael T. Possignolo, Elnaz Ebrahimi, Haven Skinner, Jose Renau. Advanced Logic Synthesis (<strong>Book Chapter</strong>), December 2017.</description>
	
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        <pubDate>Mon, 04 Dec 2017</pubDate>
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	<title>New Paper: Liam: An Actor Based Programming Model for HDLs</title>
        
          <link>docs/memocode17.pdf</link>
        
	<description>Haven Skinner, Rafael T. Possignolo, and Jose Renau. 15th ACM-IEEE International Conference on Formal Methods and Models for System Design (<strong>MEMOCODE</strong>), October 2017.</description>
	
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        <pubDate>Sat, 30 Sep 2017</pubDate>
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	<title>New Paper: Architectural Opportunities for Novel Dynamic EMI Shifting (DEMIS)</title>
        
          <link>docs/micro17.pdf</link>
        
	<description>Daphne I. Gorman, Jose Renau, and Matthew Guthaus. 50th International Symposium on Microarchitecture (<strong>MICRO</strong>), October 2017.</description>
	
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        <pubDate>Sun, 10 Sep 2017</pubDate>
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	<title>HPCA conference call for papers</title>
        
          <link>http://hpca2018.ece.ucsb.edu/</link>
        
	<description>
	  Papers are due on 2017-08-01.
	  HPCA 2017
	</description>
	
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        <pubDate>Tue, 01 Aug 2017</pubDate>
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	<title>New Paper: Advanced Logic Synthesis book chapter titled Automated Pipeline Transformations with Fluid Pipelines</title>
        
	<description>Rafael T. Possignolo and Elnaz Ebrahimi and Haven Skinner and Jose Renau. In Reis, André Inácio, Drechsler, Rolf (Eds.), Advanced Logic Synthesis (Springer), 2018.</description>
	
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        <pubDate>Fri, 01 Sep 2017</pubDate>
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	<title>New Paper: Anubis: A new benchmark for incremental synthesis</title>
        
          <link>docs/iwls17.pdf</link>
        
	<description>Rafael T. Possignolo, Nursultan Kabylkas, and Jose Renau, International Workshop Logic and Synthesis (<strong>IWLS</strong>), June 2017.</description>
	
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        <pubDate>Thu, 01 Jun 2017</pubDate>
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	<title>New Paper: LiveSynth: Towards an Interactive Synthesis Flow</title>
        
          <link>docs/dac17.pdf</link>
        
	<description>Rafael T. Possignolo, and Jose Renau, Design Automation Conference (<strong>DAC</strong>), June 2017.</description>
	
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        <pubDate>Thu, 01 Jun 2017</pubDate>
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	<title>New Paper: Timing Speculative SRAM</title>
        
          <link>docs/iscas17a.pdf</link>
        
	<description>Elnaz Ebrahimi, Matthew Guthaus, and Jose Renau, International Symposium on Circuits and Systems (<strong>ISCAS</strong>), May 2017.</description>
	
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        <pubDate>Mon, 01 May 2017</pubDate>
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	<title>New Paper: Level Shifter Design for Voltage Stacking</title>
        
          <link>docs/iscas17b.pdf</link>
        
	<description>Elnaz Ebrahimi, Rafael T. Possignolo, and Jose Renau, International Symposium on Circuits and Systems (<strong>ISCAS</strong>), May 2017.</description>
	
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        <pubDate>Mon, 01 May 2017</pubDate>
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	<title>New Paper: LiveSynth: Towards an Interactive Synthesis Flow</title>
        
          <link>docs/hotchips16.pdf</link>
        
	<description>Rafael T. Possignolo, Jose Renau, Hot Chips A Symposium on High Performance Chips (HotChips poster), August 2016.</description>
	
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        <pubDate>Sun, 21 Aug 2016</pubDate>
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	<title>New Paper: Overhead of Deoptimization Checks in the V8 JavaScript Engine</title>
        
          <link>docs/iiswc16.pdf</link>
        
	<description>Gabriel Southern and Jose Renau, International Symposium on Workload Characterization (<strong>IISWC</strong>), July 2016.</description>
	
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        <pubDate>Fri, 01 Jul 2016</pubDate>
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	<title>New Paper: Fluid Pipelines: Elastic Circuitry meets Out-of-Order Execution</title>
        
          <link>docs/iccd16.pdf</link>
        
	<description>Rafael T. Possignolo, Elnaz Ebrahimi, Haven Skinner, and Jose Renau, International Conference on Computer Design (<strong>ICCD</strong>), June 2016.</description>
	
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        <pubDate>Mon, 06 Jun 2016</pubDate>
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	<title>New Paper: Fluid Pipelines: Elasticity without Throughput Penalty</title>
        
          <link>docs/iwls16.pdf</link>
        
	<description>Rafael T. Possignolo, Elnaz Ebrahimi, Haven Skinner, and Jose Renau, International Workshop on Logic and Synthesis (<strong>IWLS</strong>), April 2016.</description>
	
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        <pubDate>Wed, 01 Jun 2016</pubDate>
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	<title>New Paper: SRAM Voltage Stacking</title>
        
          <link>docs/iscas16.pdf</link>
        
	<description>Elnaz Ebrahimi, Rafael T. Possignolo, and Jose Renau, International Symposium on Circuits and Systems (<strong>ISCAS</strong>), May 2016.</description>
	
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        <pubDate>Sun, 01 May 2016</pubDate>
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	<title>New Paper: Analysis of PARSEC Workload Scalability</title>
        
          <link>docs/ispass16.pdf</link>
        
	<description>Gabriel Southern and Jose Renau, International Symposium on Performance Analysis of Systems and Software (<strong>ISPASS</strong>), April 2016.</description>
	
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        <pubDate>Fri, 01 Apr 2016</pubDate>
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	<title>New Paper: LiveSim: Going Live with Microarchitecture Simulation</title>
        
          <link>docs/hpca16.pdf</link>
        
	<description>Sina Hassani, Gabriel Southern and Jose Renau, International Symposium on High-Performance Computer Architecture (<strong>HPCA</strong>), February 2016.</description>
	
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        <pubDate>Tue, 01 Mar 2016</pubDate>
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	<title>NSF SHF Cascode Supporting and Leveraging Voltage Stacking in Future Microprocessors ($285K)</title>
	
	<description>NSF grant with Michael Huang on voltage stacking
	</description>
	
	
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        <pubDate>Wed, 01 Jul 2015</pubDate>
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	<title>New Paper: GPU NTC Process Variation Compensation with Voltage Stacking</title>
        
          <link>docs/pact15.pdf</link>
        
	<description>Rafael T. Possignolo, Ehsan Ardestani, Alamelu Sankaranarayanan, Jose Luis Briz, Jose Renau, International Conference on Parallel Architectures and Compilation Techniques (PACT poster), October 2015.</description>
	
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        <pubDate>Sat, 10 Oct 2015</pubDate>
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	<title>New Paper: Deconstructing PARSEC Scalability</title>
        
          <link>docs/wddd15.pdf</link>
        
	<description>Gabriel Southern and Jose Renau, Workshop on Duplicating, Deconstructing and Debunking (<strong>WDDD</strong>), 2015.</description>
	
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        <pubDate>Mon, 01 Jun 2015</pubDate>
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	<title>New Paper: Managing Mismatches in Voltage Stacking with CoreUnfolding</title>
        
          <link>docs/taco15.pdf</link>
        
	<description>Ehsan K. Ardestani, Rafael T. Possignolo, Jose Luis Briz, and Jose Renau, ACM's Transactions on Architecture and Code Optimization (<strong>TACO</strong>), September 2015.</description>
	
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        <pubDate>Tue, 10 Nov 2015</pubDate>
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	<title>New Paper: Section Based Program Analysis to Reduce Overhead of Detecting Unsynchronized Thread Communication</title>
        
          <link>docs/taco14.pdf</link>
        
	<description>Madan Das, Gabriel Southern and Jose Renau, ACM's Transactions on Architecture and Code Organization (<strong>TACO</strong>), 2015.</description>
	
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        <pubDate>Fri, 01 May 2015</pubDate>
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	<title>New Paper: Section Based Program Analysis to Reduce Overhead of Detecting Unsynchronized Thread Communication</title>
        
          <link>docs/ppopp15.pdf</link>
        
	<description>Madan Das, Gabriel Southern, and Jose Renau, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (<strong>PPoPP Poster</strong>), February 2015</description>
	
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        <pubDate>Sun, 01 Feb 2015</pubDate>
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	<title>New Paper: Deterministic Scaling</title>
        
          <link>docs/wodet13a.pdf</link>
        
	<description>Gabriel Southern, Madan Das, and Jose Renau, Workshop on Determinism and Correctness in Parallel Programming (<strong>WODET</strong>), March 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/51</guid>
	
        
          
	
        <pubDate>Mon, 01 Apr 2013</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Reducing Logging Overhead for Deterministic Execution</title>
        
          <link>docs/wodet13b.pdf</link>
        
	<description>Madan Das, Gabriel Southern, and Jose Renau, Workshop on Determinism and Correctness in Parallel Programming (<strong>WODET</strong>), March 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/52</guid>
	
        
          
	
        <pubDate>Mon, 01 Apr 2013</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Power Blurring: Fast Static and Transient Thermal Analysis Method for Packaged Integrated Circuits and Power Devices</title>
        
          <link>docs/tcad13.pdf</link>
        
	<description>Amirkoushyar Ziabari, Je-Hyoung Park, Ehsan K. Ardestani, Jose Renau, Sung-Mo Kang, and Ali Shakouri IEEE Transactions on Very Large Scale Integration Systems (<strong>TVLSI</strong>), 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/53</guid>
	
        
          
	
        <pubDate>Sun, 01 Dec 2013</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>Intel Gift</title>
	
	<description>Intel Xeon donation for new cluster
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/54</guid>
	
        
          
	
        <pubDate>Sat, 10 Nov 2012</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>NSF XPS Cooperative Deterministic Concurrency ($750K)</title>
	
	<description>NSF grant with Cormac on simplifying parallel programming
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/55</guid>
	
        
          
	
        <pubDate>Thu, 12 Sep 2013</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>NSF CSR Rethinking the Memory Hierarchy ($500K)</title>
	
	<description>NSF grant to build more efficient and simpler memory hierarchies
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/56</guid>
	
        
          
	
        <pubDate>Fri, 12 Jul 2013</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: ESESC A Fast Performance, Power, and Temperature Multicore Simulator</title>
        
          <link>docs/hotchips13.pdf</link>
        
	<description>Ehsan K.Ardestani, Gabriel Southern, Jason Doung, Elnaz Ebrahimi, Jose Renau, Hot Chips A Symposium on High Performance Chips (<strong>HotChips poster</strong>), August 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/57</guid>
	
        
          
	
        <pubDate>Wed, 21 Aug 2013</pubDate>
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	<title>New Paper: An Energy Efficient GPGPU Memory Hierarchy with Tiny Incoherent Caches</title>
        
          <link>docs/islped13.pdf</link>
        
	<description>Alamelu Sankaranarayanan, Ehsan K.Ardestani, Jose Luis Briz, and Jose Renau, International Symposium on Low Power Electronics and Design (<strong>ISLPED</strong>), September 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/58</guid>
	
        
          
	
        <pubDate>Thu, 15 Aug 2013</pubDate>
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	<title>New Paper: Sampling in Thermal Simulation of Processors: Measurement, Characterization, and Evaluation</title>
        
          <link>docs/tcad13.pdf</link>
        
	<description>Ehsan K.Ardestani, Francisco J.  Mesa-Martinez , Gabriel Southern , Elnaz Ebrahimi , Jose Renau IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (<strong>TCAD</strong>), August 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/59</guid>
	
        
          
	
        <pubDate>Thu, 01 Aug 2013</pubDate>
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	<title>New Paper: ESESC: A Fast Multicore Simulator Using Time-Based Sampling</title>
        
          <link>docs/hpca13.pdf</link>
        
	<description>Ehsan K.Ardestani, and Jose Renau, International Symposium on High-Performance Computer Architecture (<strong>HPCA</strong>), February 2013.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/60</guid>
	
        
          
	
        <pubDate>Fri, 15 Feb 2013</pubDate>
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	<title>Two new PhD Students (Rafael and Daphne)</title>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/61</guid>
	
        
          
	
        <pubDate>Wed, 01 Aug 2012</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>NSF CRI Thermal Simulation ($290K)</title>
	
	<description>NSF Fast Performance, Power and Thermal Modeling for Heterogenous System
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/62</guid>
	
        
          
	
        <pubDate>Thu, 12 Jul 2012</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>NSF CRI Fabrication Multicore Research ($120K)</title>
	
	<description>NSF Prototyping Platfform to Enable Power-Centric Multicore Research
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/63</guid>
	
        
          
	
        <pubDate>Sat, 10 Sep 2011</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: Thermal-Aware Sampling in Architectural Simulation</title>
        
          <link>docs/islped12.pdf</link>
        
	<description>Ehsan K.Ardestani, Elnaz Ebrahimi, Gabriel Southern, and Jose Renau, International Symposium on Low Power Electronics and Design (<strong>ISLPED</strong>), August 2012.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/64</guid>
	
        
          
	
        <pubDate>Wed, 01 Aug 2012</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Enabling Power Density and Thermal-Aware Floorplanning</title>
        
          <link>docs/semitherm12.pdf</link>
        
	<description>Ehsan K. Ardestani, Amirkoushyar Ziabari, Ali Shakouri, and Jose Renau, 28th Annual Thermal Measurement, Modeling and Management Symposium (<strong>SEMITHERM</strong>), March 2012.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/65</guid>
	
        
          
	
        <pubDate>Sun, 11 Mar 2012</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>ISCA conference call for papers</title>
        
          <link>http://isca2012.ittc.ku.edu/</link>
        
	<description>
	  Papers are due on 2011-10-14.
	  ISCA 2012
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/66</guid>
	
        
          
	
        <pubDate>Fri, 14 Oct 2011</pubDate>
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      <item>
	
	<title>New Paper: ReRack: Power Simulation for Data Centers with Renewable Energy Generation</title>
        
          <link>docs/rerack.pdf</link>
        
	<description>Michael Brown, and Jose Renau, GreenMetrics 2011,held in conjunction SIGMETRICS 2011, June 2011.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/67</guid>
	
        
          
	
        <pubDate>Sat, 21 May 2011</pubDate>
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	<title>ASPLOS conference call for papers</title>
        
          <link>http://research.microsoft.com/en-us/um/cambridge/events/asplos_2012/cfp.html</link>
        
	<description>
	  Papers are due on 2011-07-25.
	  ASPLOS 2012
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/68</guid>
	
        
          
	
        <pubDate>Mon, 25 Jul 2011</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New blog in <a href="http://computerarch.com">computer architecture</a></title>
	
	<description>New computer architecture blog
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/69</guid>
	
        
          
	
        <pubDate>Thu, 03 Mar 2011</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: Releasing Efficient Beta Cores to Market Early</title>
        
          <link>docs/isca11.pdf</link>
        
	<description>Sangeetha Sudhakrishnan, Rigo Dicochea, and Jose Renau, International Symposium on Computer Architecture (<strong>ISCA</strong>), June 2011.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/70</guid>
	
        
          
	
        <pubDate>Thu, 03 Mar 2011</pubDate>
      </item>
    
      
      
      
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	<title>HotCloud conference call for papers</title>
        
          <link>http://www.usenix.org/events/hotcloud11/</link>
        
	<description>
	  Papers are due on 2011-03-07.
	  HotCould Workshop
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/71</guid>
	
        
          
	
        <pubDate>Mon, 07 Mar 2011</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: Fast Thermal Simulators for Architecture Level Integrated Circuit Design</title>
        
          <link>docs/semitherm11.pdf</link>
        
	<description>Amirkoushyar Ziabari, Ehsan K. Ardestani, Jose Renau, and Ali Shakouri, 27th Annual Thermal Measurement, Modeling and Management Symposium (<strong>SEMITHERM</strong>), March 2011.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/72</guid>
	
        
          
	
        <pubDate>Fri, 11 Mar 2011</pubDate>
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	<title>New Paper: A Design Time Simulator for Computer Architects</title>
        
          <link>docs/isqed11.pdf</link>
        
	<description>Sangeetha Sudhakrishnan, Francisco J. Mesa-Martinez, and Jose Renau, IEEE International Symposium on Quality Electronic Design (<strong>ISQED</strong>), March 2011. (<strong>Best  paper award</strong>)</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/73</guid>
	
        
          
	
        <pubDate>Thu, 17 Mar 2011</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>ICS conference call for papers</title>
        
          <link>http://ics11.cs.arizona.edu/</link>
        
	<description>
	  Papers are due on 2011-01-14.
	  International Conference on Supercomputing
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/74</guid>
	
        
          
	
        <pubDate>Fri, 14 Jan 2011</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>AMD Gift</title>
	
	<description>AMD Magny-Cours for our cluster
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/75</guid>
	
        
          
	
        <pubDate>Fri, 15 Oct 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>ISCA conference call for papers</title>
        
          <link>http://isca2011.umaine.edu/</link>
        
	<description>
	  Papers are due on 2010-11-15.
	  International Symposium on Computer Architecture
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/76</guid>
	
        
          
	
        <pubDate>Mon, 15 Nov 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>HPCA conference call for papers</title>
        
          <link>http://www.hpcaconf.org</link>
        
	<description>
	  Papers are due on 2010-08-27.
	  International Symposium on High-Performance Computer Architecture
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/77</guid>
	
        
          
	
        <pubDate>Fri, 27 Aug 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>ASPLOS conference call for papers</title>
        
          <link>http://asplos11.cs.ucr.edu</link>
        
	<description>
	  Papers are due on 2010-07-26.
	  International Conference on Archtectural Support for Programing Languages and Operating Systems'
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/78</guid>
	
        
          
	
        <pubDate>Mon, 26 Jul 2010</pubDate>
      </item>
    
      
      
      
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	<title>MICRO conference call for papers</title>
        
          <link>http://www.microarch.org/micro43/</link>
        
	<description>
	  Papers are due on 2010-06-11.
	  International Symposium on Microarchitecture
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/79</guid>
	
        
          
	
        <pubDate>Fri, 11 Jun 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>ICCAD conference call for papers</title>
        
          <link>http://www.iccad.com/2010/index.html</link>
        
	<description>
	  Papers are due on 2010-04-19.
	  International Conference on Computer-Aided Design
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/80</guid>
	
        
          
	
        <pubDate>Mon, 19 Apr 2010</pubDate>
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      <item>
	
	<title>ISLPED conference call for papers</title>
        
          <link>http://www.islped.org/</link>
        
	<description>
	  Papers are due on 2010-03-05.
	  International Symposium on Low Power Electronics and Design
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/81</guid>
	
        
          
	
        <pubDate>Fri, 05 Mar 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>PACT conference call for papers</title>
        
          <link>http://pactconf.org</link>
        
	<description>
	  Papers are due on 2010-03-20.
	  Parallel Architectures and Compilation Technique
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/82</guid>
	
        
          
	
        <pubDate>Sat, 20 Mar 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>HOTCHIPS conference call for papers</title>
        
          <link>http://hotchips.org</link>
        
	<description>
	  Papers are due on 2010-03-23.
	  A Symposium on High-Performance Chips
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/83</guid>
	
        
          
	
        <pubDate>Tue, 23 Mar 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Real-time control for Keck Observatory next-generation adaptive optics</title>
        
          <link>docs/kao10.pdf</link>
        
	<description>Marc Reinig, Donald Gavel, Ehsan Ardestani, Jose Renau, Proceedings of the SPIE, 2010.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/84</guid>
	
        
          
	
        <pubDate>Fri, 10 Dec 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Characterizing Processor Thermal Behavior</title>
        
          <link>docs/asplos10.pdf</link>
        
	<description>Francisco J. Mesa-Martinez, Ehsan Ardestani, and Jose Renau, Fifteenth International Conference on Architectural Support for Programming Languages and Operating Systems (<strong>ASPLOS</strong>), March 2010.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/85</guid>
	
        
          
	
        <pubDate>Wed, 17 Mar 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Cooling Solutions for Processor Infrared Thermography</title>
        
          <link>docs/semitherm10.pdf</link>
        
	<description>Ehsan Ardestani, Francisco J. Mesa-Martinez, and Jose Renau, 26th Annual Thermal Measurement, Modeling and Management Symposium (<strong>SEMITHERM</strong>), February 2010.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/86</guid>
	
        
          
	
        <pubDate>Sun, 21 Feb 2010</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: SOI, Interconnect, Package, and Mainboard Thermal Characterization</title>
        
          <link>docs/islped09.pdf</link>
        
	<description>Joseph Nayfach-Battilana and Jose Renau, International Symposium on Low Power Electronics and Design (<strong>ISLPED</strong>), August 2009 (poster  paper).</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/87</guid>
	
        
          
	
        <pubDate>Fri, 21 Aug 2009</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Measuring and Modeling Variability using Low-Cost FPGAs</title>
        
          <link>docs/mobs09_brown.pdf</link>
        
	<description>Michael Brown, Cyrus Bazeghi, Matthew R. Gutthaus, and Jose Renau, Workshop on Modeling, Benchmarking and Simulation (<strong>MOBS</strong>), held inconjunction with ISCA-36, June 2009.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/88</guid>
	
        
          
	
        <pubDate>Wed, 22 Jul 2009</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New PhD Student (Elnaz Ebrahimi)</title>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/89</guid>
	
        
          
	
        <pubDate>Fri, 01 May 2009</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Measuring and Modeling Variability using Low-Cost FPGAs</title>
        
          <link>docs/fpga09.pdf</link>
        
	<description>Michael Brown, Cyrus Bazeghi, Matthew Guthaus and Jose Renau, Poster at the International Symposium on Field-Programmable Gate Arrays (<strong>FPGA</strong>), February 2009.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/90</guid>
	
        
          
	
        <pubDate>Tue, 24 Feb 2009</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>Sun Gift ($75K)</title>
	
	<description>Gift to support thermal projects at the MASC group.
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/91</guid>
	
        
          
	
        <pubDate>Thu, 15 Jan 2009</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Understanding bug fix patterns in verilog</title>
        
          <link>docs/msr08.pdf</link>
        
	<description>Sangeetha Sudakrishnan, Janaki T. Madhavan, E. James Whitehead Jr., Jose Renau, Fith International Workshop on Mining Software Repositories, May 2008.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/92</guid>
	
        
          
	
        <pubDate>Wed, 16 Jul 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Implementation of a Power Efficient High Performance FPU for SCOORE</title>
        
          <link>docs/warp08.pdf</link>
        
	<description>Wael Ali Ashmawi, John Burr, Abhishek Sharma, Jose Renau, Workshop on Architectural Research Prototyping (<strong>WARP</strong>), held inconjunction with ISCA-35, June 2008.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/93</guid>
	
        
          
	
        <pubDate>Wed, 18 Jun 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New thermal page</title>
	
	<description>This page shows several of the thermal measurements performed by the MASC group
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/94</guid>
	
        
          
	
        <pubDate>Mon, 09 Jun 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New PhD Students (Gabriel Southern and Ehsan Ardestani)</title>
	
	<description>Both would start in Fall 08
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/95</guid>
	
        
          
	
        <pubDate>Sun, 08 Jun 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>Therminic conference call for papers</title>
        
          <link>http://cmp.imag.fr/conferences/therminic2008/</link>
        
	<description>
	  Papers are due on 2008-03-30.
	  International Workshop on Thermal inverstigations of ICs and Systems
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/96</guid>
	
        
          
	
        <pubDate>Sun, 30 Mar 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>ICCAD conference call for papers</title>
        
          <link>http://www.iccad.com</link>
        
	<description>
	  Papers are due on 2008-04-14.
	  International Conference on Computer-Aided Design
	</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/97</guid>
	
        
          
	
        <pubDate>Mon, 14 Apr 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>NSF CRI Infrared Equipment ($275K)</title>
	
	<description>NSF Infrastructre award to purchase the IR measurement setup.
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/98</guid>
	
        
          
	
        <pubDate>Thu, 10 Apr 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New PhD Student (Alamelu)</title>
	
	<description>Alamelu will start her PhD once she finishes the MS.
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/99</guid>
	
        
          
	
        <pubDate>Sat, 12 Jan 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Measuring Power and Temperature from Real Processors</title>
        
          <link>docs/ngs08.pdf</link>
        
	<description>Francisco-Javier Mesa-Martinez, Michael Brown, Joseph Nayfach-Battilana, Jose Renau, The Next Generation Software (NGS) Workshop (<b>NGS08</b>) held in conjunction with IPDPS, April 2008.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/100</guid>
	
        
          
	
        <pubDate>Tue, 01 Apr 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: WACI</title>
        
	<description>uDSim, a Microprocessor Design Time Simulation Infrastructure. Sangeetha Sudhakrishnan, Francisco-Javier Mesa-Martinez, Jose Renau, Wild and Crazy Ideas VI (<b>WACI</b>) held in conjunction with ASPLOS, March 2008.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/101</guid>
	
        
          
	
        <pubDate>Sat, 01 Mar 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Processor Verification with hwBugHunt</title>
        
          <link>docs/isqed08.pdf</link>
        
	<description>Sangeetha Sudhakrishnan, Liying Su, and Jose Renau, IEEE International Symposium on Quality Electronic Design (<strong>ISQED</strong>), March 2008.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/102</guid>
	
        
          
	
        <pubDate>Thu, 10 Jan 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Springer</title>
        
	<description>System and Processor Design Effort Estimation, Cyrus Bazeghi, Francisco J. Mesa-Martinez, and Jose Renau, Springer Research Trends in VLSI and Systems on Chip.</description>
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/103</guid>
	
        
          
	
        <pubDate>Fri, 01 Feb 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>nVIDIA Gift ($70K)</title>
	
	<description>Gift to support thermal projects at the MASC group.
	</description>
	
	
  <guid isPermaLink="false">http://masc.cse.ucsc.edu/masc_rss/104</guid>
	
        
          
	
        <pubDate>Thu, 10 Jan 2008</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>NSF CSR Infrared Thermal Measurement ($300K)</title>
	
	<description>Three years NSF grant for the thermal measurement infrastructure setup.
	</description>
	
	
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        <pubDate>Wed, 10 Oct 2007</pubDate>
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	<title>PACT conference call for papers</title>
        
          <link>http://www.eecg.toronto.edu/pact/</link>
        
	<description>
	  Papers are due on 2008-03-20.
	  Parallel Architectures and Compilation Techniques (PACT)
	</description>
	
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        <pubDate>Thu, 20 Mar 2008</pubDate>
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	<title>New BLOG for the MASC group</title>
	
	
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        <pubDate>Thu, 23 Aug 2007</pubDate>
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	<title>New Paper: Effective Optimistic-Checker Tandem Core Design Through Architectural Pruning</title>
        
          <link>docs/micro07.pdf</link>
        
	<description>Francisco J. Mesa-Martinez and Jose Renau, 40th International Symposium on Microarchitecture (<strong>MICRO</strong>), December 2007.</description>
	
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        <pubDate>Mon, 10 Sep 2007</pubDate>
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	<title>New Paper: Estimating Design Time for System Circuits</title>
        
          <link>docs/vlsisoc07.pdf</link>
        
	<description>Cyrus Bazeghi, Francisco J. Mesa-Martinez, Brian Greskamp, Josep Torrellas, and Jose Renau, 15th IFIP International Conference on Very Large Scale Integration (<strong>VLSI-SoC</strong>), October 2007.</description>
	
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        <pubDate>Fri, 10 Aug 2007</pubDate>
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	<title>Xilinx Equipment Donation</title>
	
	<description>We have licenses to the latest Xilinx software tools.
	</description>
	
	
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        <pubDate>Sun, 01 Jul 2007</pubDate>
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	<title>ISCA conference call for papers</title>
        
          <link>http://isca2008.cs.princeton.edu/index.html</link>
        
	<description>
	  Papers are due on 2007-11-09.
	  First-tier conference on computer architecture. This year, it is held on <strong>China</strong>.
	</description>
	
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        <pubDate>Fri, 09 Nov 2007</pubDate>
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	<title>Javi Graduated</title>
	
	<description>His thesis introduces a new methodology to improve processor efficiency by reducing the size of the codebase for a processor design in order to manage increases in complexity and extract further performance from already existing design. Based on this methodology he introduces a novel Tandem architecture which combines a complex out-of-order core, that has some of it underutilized functionality removed, with a verified simpler in-order core that guarantees forward progress whenever excised functionality from the complex processor is exercised.
	</description>
	
	
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        <pubDate>Fri, 01 Jun 2007</pubDate>
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	<title>NASA/UARC "Radiation Tolerant FPGA Processor" ($25K)</title>
	
	<description>Grant to continue supporting the development of the SCOORE project.
	</description>
	
	
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        <pubDate>Thu, 10 May 2007</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: Power Model Validation Through Thermal Measurements</title>
        
          <link>docs/isca07.pdf</link>
        
	<description>Francisco J. Mesa-Martinez, Joseph Nayfach-Battilan, and Jose Renau, International Symposium on Computer Architecture (<strong>ISCA</strong>), June 2007.</description>
	
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        <pubDate>Tue, 01 May 2007</pubDate>
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	<title>New Paper: Measuring Performance, Power, and Temperature from Real Processors</title>
        
          <link>docs/wecs07.pdf</link>
        
	<description>Francisco J. Mesa-Martinez, Michael Brown, Joseph Nayfach-Battilana, and Jose Renau, 1st Workshop on Experimental Computer Science (FCRC), June 2007.</description>
	
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        <pubDate>Tue, 01 May 2007</pubDate>
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	<title>SUN OpenSPARC Center of Excellence at Santa Cruz</title>
	
	<description>Sun created the first ever OpenSPARC Center of Excellence at UCSC.
	</description>
	
	
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        <pubDate>Fri, 02 Feb 2007</pubDate>
      </item>
    
      
      
      
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	<title>SUN Academic Excellence Grant ($110K)</title>
	
	<description>Sun donated $110K equipment to our group. Thanks Sun for this wonderful gift.
	</description>
	
	
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        <pubDate>Thu, 01 Feb 2007</pubDate>
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	<title>New Paper: SEED Scalable, Efficient Enforcement of Dependences</title>
        
          <link>docs/pact06.pdf</link>
        
	<description>Francisco J. Mesa-Martinez, Michael C.Huang, and Jose Renau, 15th  International Conference on Parallel Architectures and Compilation Techniques (<strong>PACT</strong>), September 2006.</description>
	
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        <pubDate>Fri, 01 Sep 2006</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>New Paper: Printed Circuit Board Layout Time Estimation</title>
        
          <link>docs/wced06.pdf</link>
        
	<description>Cyrus  Bazeghi  and  Jose Renau,  7th  Workshop  on Complexity-Effective Design (<strong>WCED</strong>),  held in conjunction with ISCA-33, June 2006.</description>
	
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        <pubDate>Thu, 01 Jun 2006</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: SCOORE Santa Cruz Out-of-Order RISC Engine, FPGA Design Issues</title>
        
          <link>docs/warp06.pdf</link>
        
	<description>Francisco J.  Mesa-Martinez, Abhishek Sharma, Andrew W.  Hill, Carlos A.  Cabrera, Cyrus Bazeghi, Hari Kolakaleti, Joseph Nayfach, Keertika Singh, Kevin S. Halle, Matthew D. Fischler, Melisa Nuñez, Sangeetha Nair, Suraj Narender Kurapati, Wael Ali Ashmawi, and Jose Renau , Workshop on Architectural Research Prototyping (<strong>WARP</strong>), held inconjunction with ISCA-33, June 2006.</description>
	
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        <pubDate>Thu, 01 Jun 2006</pubDate>
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	<title>IES Berkeley/France Fund ($9K)</title>
	
	<description>This small grant is shared with <a href="http://www-rocq.inria.fr/~acohen/index.html.en">Albert Cohen</a> from INRIA. The objective is to establish a collaboration between the two centers.
	</description>
	
	
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        <pubDate>Mon, 01 May 2006</pubDate>
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	<title>New Paper: Using Checkpoint-Assisted Value Prediction to Hide L2 Misses</title>
        
          <link>docs/cava_taco.pdf</link>
        
	<description>Luis Ceze, Karin Strauss, James Tuck, Jose Renau, and Josep Torrellas, ACM's Transactions on Architecture and Code Optimization (<strong>TACO</strong>), March 2006.</description>
	
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        <pubDate>Wed, 01 Mar 2006</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: POSH A TLS Compiler that Exploits Program Structure</title>
        
          <link>docs/ppopp06.pdf</link>
        
	<description>Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin Strauss, Jose Renau and Josep Torrellas, ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (<strong>PPoPP</strong>), March 2006.</description>
	
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        <pubDate>Wed, 01 Mar 2006</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>Special Research Grant from UCSC ($12K)</title>
	
	<description>Small explorative grant to rent/purchase equipment to get preliminary results on thermal projects.
	</description>
	
	
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        <pubDate>Wed, 01 Feb 2006</pubDate>
      </item>
    
      
      
      
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	<title>NASA/UARC "Checkpointed Fault Tolerant FPGA Systems" ($50K)</title>
	
	<description>Grant to support the development of the SCOORE project.
	</description>
	
	
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        <pubDate>Fri, 20 Jan 2006</pubDate>
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	<title>NSF CAREER ($400K)</title>
	
	<description>The goal of this CAREER is to understand, estimate, and reduce processor design complexity. To do so, the PI plans to develop uComplexity metrics to understand and estimate processor design complexity. The uComplexity metric consist of three main parts, namely a procedure to account for the contributions of the different components in the design, accurate statistical regression of experimental measures using a nonlinear mixed-effects model, and a productivity adjustment to account for the productivities of different teams. Once the metrics are developed, the we plan to develop new approaches to reduce processor design complexity.
	</description>
	
	
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        <pubDate>Fri, 20 Jan 2006</pubDate>
      </item>
    
      
      
      
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	<title>New Paper: Energy-Efficient Thread-Level Speculation on a CMP</title>
        
          <link>docs/toppicks06.pdf</link>
        
	<description>Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas, IEEE Micro Special Issue <strong>Micro's Top Picks</strong> from Computer Architecture Conferences, January-February 2006.</description>
	
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        <pubDate>Sun, 01 Jan 2006</pubDate>
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	<title>New Paper: uComplexity Estimating Processor Design Effort</title>
        
          <link>docs/ucomplex.pdf</link>
        
	<description>Cyrus Bazeghi, Francisco J. Mesa-Martinez, and Jose Renau. 38th International Symposium on Microarchitecture (<strong>MICRO</strong>), November 2005.</description>
	
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        <pubDate>Tue, 01 Nov 2005</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>Sun grid donation of 100K CPU hours</title>
	
	<description>Sun has donated 100K CPU on their <a href="http://www.sun.com/service/sungrid/index.jsp">sungrid</a> project. We are not going to have CPU constraints the next year.
	</description>
	
	
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        <pubDate>Sat, 01 Oct 2005</pubDate>
      </item>
    
      
      
      
      <item>
	
	<title>Sun Niagara donation</title>
	
	<description>Sun donated a Niagara (T1) machine to our group. Thanks for the support.
	</description>
	
	
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        <pubDate>Sat, 01 Oct 2005</pubDate>
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	<title>New Paper: POSH A Profiler-Enhanced TLS Compiler that Leverages Program Structure</title>
        
          <link>docs/posh.pdf</link>
        
	<description>Wei Liu, James Tuck, Luis Ceze, Karin Strauss, Jose Renau, and Josep Torrellas. The Second Watson Conference on Interaction between Architecture, Circuits, and Compilers (<strong>P=AC2</strong>), September 2005.</description>
	
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        <pubDate>Thu, 01 Sep 2005</pubDate>
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	<title>New Paper: Thread-Level Speculation on a CMP Can Be Energy Efficient</title>
        
          <link>docs/ics05_power.pdf</link>
        
	<description>Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas. International Conference on Supercomputing (<strong>ICS</strong>), June 2005.</description>
	
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        <pubDate>Wed, 01 Jun 2005</pubDate>
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      <item>
	
	<title>New Paper: Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors Microarchitecture and Compilation</title>
        
          <link>docs/ics05_ooo.pdf</link>
        
	<description>Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas. International Conference on Supercomputing (<strong>ICS</strong>), June 2005.</description>
	
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        <pubDate>Wed, 01 Jun 2005</pubDate>
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      <item>
	
	<title>Altera Equipment Donation</title>
	
	<description>We have floating Quartus licenses.
	</description>
	
	
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        <pubDate>Fri, 01 Apr 2005</pubDate>
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	<title>New Paper: CAVA Hiding L2 Misses with Checkpoint-Assisted Value Prediction</title>
        
          <link>docs/cava04.pdf</link>
        
	<description>Luis Ceze, Karin Strauss, James Tuck, Jose Renau, and Josep Torrellas, IEEE TCCA Computer Architecture Letters (<strong>TCCA</strong>), Dec 2004.</description>
	
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        <pubDate>Wed, 01 Dec 2004</pubDate>
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      <item>
	
	<title>HPCS Complexity Management (Prime DoD/DARPA, Agency UIUC)</title>
	
	<description>Small grant to purchase some equipment.
	</description>
	
	
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        <pubDate>Fri, 01 Oct 2004</pubDate>
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	<title>UCSC Faculty Development award ($2K)</title>
	
	<description>First small grant for our group.
	</description>
	
	
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        <pubDate>Thu, 01 Jul 2004</pubDate>
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	<title>New Paper: Managing Multiple Low-Power Adaptation Techniques The Positional Approach</title>
        
          <link>docs/ieeecomputer03.pdf</link>
        
	<description>Michael Huang, Jose Renau and Josep Torrellas, Sidebar on Special Issue on Power-Aware Computing, (<strong>IEEE Computer</strong>), December 2003.</description>
	
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        <pubDate>Mon, 01 Sep 2003</pubDate>
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	<title>New Paper: Positional Adaptation of Processors Application to Energy Reduction</title>
        
          <link>docs/isca03.pdf</link>
        
	<description>Michael Huang, Jose Renau, and Josep Torrellas, International Symposium on Computer Architecture (<strong>ISCA</strong>), June 2003.</description>
	
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        <pubDate>Sun, 01 Jun 2003</pubDate>
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      <item>
	
	<title>New Paper: Programming a Parallel Intelligent Memory System</title>
        
          <link>docs/ppopp03.pdf</link>
        
	<description>Basilio B. Fraguela, Jose Renau, Paul Feautrier, David Padua, and Josep Torrellas, Symposium on Principles and Practice of Parallel Programming (<strong>PPoPP</strong>), June 2003.</description>
	
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        <pubDate>Sun, 01 Jun 2003</pubDate>
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	<title>New Paper: Cherry Checkpointed Early Resource Recycling in Out-of-order Microprocessors</title>
        
          <link>docs/micro02.pdf</link>
        
	<description>Jose F. Martinez (Cornell University), Jose Renau (University of Illinois), Michael Huang (University of Rochester), Milos Prvulovic, and Josep Torrellas (University of Illinois), 35th International Symposium on Microarchitecture (<strong>MICRO</strong>), November 2002.</description>
	
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        <pubDate>Fri, 01 Nov 2002</pubDate>
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      <item>
	
	<title>New Paper: Energy-Efficient Hybrid Wakeup Logic</title>
        
          <link>docs/islped02.pdf</link>
        
	<description>Michael Huang, Jose Renau, and Josep Torrellas, International Symposium on Low Power Electronics and Design (<strong>ISLPED</strong>), August 2002.</description>
	
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        <pubDate>Thu, 01 Aug 2002</pubDate>
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	<title>New Paper: A Framework for Dynamic Energy Efficiency and Temperature Management</title>
        
          <link>docs/jilpdeetm.pdf</link>
        
	<description>Michael Huang, Jose Renau, and Josep Torrellas Journal on Instruction Level Parallelism (<strong>JILP</strong>), 2002.</description>
	
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        <pubDate>Sat, 01 Jun 2002</pubDate>
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	<title>New Paper: Profiled-Based Energy Reduction for High-Performance Processors</title>
        
          <link>docs/fddo01.pdf</link>
        
	<description>Wei Huang, Jose Renau, and Josep Torrellas, 4th ACM Workshop on Feedback-Directed and Dynamic Optimization, December 2001.</description>
	
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        <pubDate>Sat, 01 Dec 2001</pubDate>
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	<title>New Paper: Energy/Performance Design of Memory Hierarchies for Processor-In-Memory Chips</title>
        
          <link>docs/verlag00.pdf</link>
        
	<description>Wei Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas, 2nd Workshop on Intelligent Memory Systems, November 2000, Lecture Notes in Computer Science(Vol.  2107) by Springer-Verlag, 2001.</description>
	
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        <pubDate>Fri, 01 Jun 2001</pubDate>
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	<title>New Paper: Cache Decomposition for Energy-Efficient Processors</title>
        
          <link>docs/islped01.pdf</link>
        
	<description>Michael Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas , International Symposium on Low Power Electronics and Design (<strong>ISLPED</strong>), August 2001.</description>
	
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        <pubDate>Wed, 01 Aug 2001</pubDate>
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	<title>New Paper: A Framework for Dynamic Energy Efficiency and Temperature Management</title>
        
          <link>docs/micro33.pdf</link>
        
	<description>Michael Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas, 33rd International Symposium on Microarchitecture (<strong>MICRO</strong>), December 2000.</description>
	
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        <pubDate>Fri, 01 Dec 2000</pubDate>
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	<title>New Paper: Memory Hierarchies in Intelligent Memories Energy/Performance Design</title>
        
          <link>docs/w00hier.pdf</link>
        
	<description>Wei Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas, Ninth Workshop on Scalable Shared Memory Multiprocessors, June, 2000.</description>
	
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        <pubDate>Thu, 01 Jun 2000</pubDate>
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