Tutorial Overview

ESESC is a fast multiprocessor simulator with detailed power, thermal, and performance models for modern out-of-order multicores. A full-day Saturday tutorial about how to use and develop ESESC will be presented at ISCA 2014 on June 14, 2014.

The tutorial will provide a comprehensive overview of ESESC while also providing detailed coverage of improvements in the memory and cache coherence modeling, and a new GPU simulation methodology that combines co-execution using native hardware with simulation using the ESESC timing and power models.

Compared with previous MICRO tutorial, this ISCA tutorial presents new topics like GPU modeling, validation, and the new memory hierarchy.

Schedule

• 8:00 - 8:30 Breakfast
• 8:30 - 9:00 Overview
• 9:00 - 9:30 Building and Running
• 9:30 - 10:00 Validation
• 10:00 - 10:30 Break
• 10:30 - 11:30 Memory Hierarchy and Cache Coherence
• 11:30 - 12:00 Power
• 12:00 - 1:00 Lunch
• 1:00 - 2:00 GPU modeling
• 2:00 - 3:00 Sampling
• 3:00 - 3:30 Break
• 3:30 - 4:00 Thermal
• 4:00 - 5:00 Recent Projects and Wrap-up / Q&A

Overview

A high level overview of how ESESC is designed, how it has been used, and how to use ESESC for your own research.

Building and Running

A hands-on session to quickly get ESESC built and running so that attendees can follow along during demos throughout the tutorial

Validation

A summary of recent work to validate the simulation results generated by ESESC with ones from real hardware (ARM Samsung chromebook).

Memory Hierarchy and Cache Coherence

An in-depth look at how to configure the simulated memory hiearchy in ESESC and how ESESC models local caches and cache coherence.

Power Model

Detailed explanation of how ESESC integrates the use of McPAT for calculating power consumption of simulated systems.

GPU Modeling

The first ever presentation of how ESESC is able to model GPU workloads by combining co-execution of CUDA applications on native hardware with a software performance timing model running in ESESC.

Thermal Model

An overview of the thermal modeling that is integrated in ESESC and an explanation of the associated configuration parameters.

Sampling Methods

A detailed explanation of how ESESC implements statistical sampling to improve simulation speed, with particular focus on the Time Based Sampling method that was presented at HPCA 2013.

Wrap-up

Conclusion that will address topics of interest raised by attendees and also survey recent work on ESESC and how ESESC is being used by the research community.

Tutorial Goals

The full day tutorial held on December 7th at MICRO 2013 will cover an introduction of the main ESESC components. It is designed for PhD students and industry researchers to get a fast introduction to ESESC and show some sample projects and advanced features.

What is ESESC?

ESESC is a fast multiprocessor simulator with detailed power, thermal, and performance models for modern out-of-order multicores. ESESC is an evolution of the popular SESC simulator (Enhanced SESC) that provides many new features.

The main ESESC characteristics are the following:

• It is very fast (over 20MIPS with sampling)

• Uses QEMU and supports user mode ARM ISA

• Models OoO and InOrder cores in detail (ROB, Instruction Window, etc)

• Supports configurable memory hierarchy, and on-chip memory controller

• Supports multicore, homogeneous and heterogeneous configurations

• Simulates multithreaded and multiprogram applications

• Models power and temperature in addition to performance, and their interactions

ESESC is a significant evolution/improvement over SESC:

• ESESC has ARM ISA, sesc had MIPS ISA.

• ESESC can run unmodified Linux ARM binaries, MIPS required a custom toolchain.

• ESESC uses QEMU for emulation, sesc had a custom emulator.

• ESESC is integrated with McPat, sesc had an older Wattch model.

• ESESC has a brand new memory hierarchy, sesc had a more complex coherence.

• ESESC has improved thermal modeling, sesc had HotSpot

• ESESC has many types of sampling (statistical, smarts, simpoint), sesc had none.

• ESESC is actively maintained, sesc is no longer mantained.

• ESESC has many bugs solved.

Tutorial Program (slides and demo instructions)

The schedule for the tutorial is listed below:

• 08:00 - 09:00: Breakfast

• 09:00 - 09:30: Overview

• 09:30 - 10:30: Code Structure and Tools

• 10:30 - 11:00: Morning Break

• 11:00 - 12:00: Timing Model

• 12:00 - 12:30: Sampling Methods Part 1

• 12:30 - 13:30: Lunch

• 13:30 - 14:15: Sampling Methods Part 2

• 14:15 - 15:00: Power Model

• 15:00 - 15:30: Afternoon Break

• 15:30 - 16:30: Thermal Model

• 16:30 - 17:00: Wrap-up

This is the post for the first ESESC public release. As usual with any academic research project, there are still more pending things to do, but I think that this version is stable and tested enough for being released.

As usual, this is provided with NO GUARANTEE of functionality. The license is BSD for the ESESC files. Where all the files should have a copyright notice like:

The ESESC/BSD License

Copyright (c) 2005-2013, Regents of the University of California and 
the ESESC Project.
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

  - Redistributions of source code must retain the above copyright notice,
  this list of conditions and the following disclaimer.

  - Redistributions in binary form must reproduce the above copyright
  notice, this list of conditions and the following disclaimer in the
  documentation and/or other materials provided with the distribution.

  - Neither the name of the University of California, Santa Cruz nor the
  names of its contributors may be used to endorse or promote products
  derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

The repository also includes (modified) code from McPat, Orion, CACTI, Wattch, Power Analyzer, QEMU, and some others. We kept all the license files from these codes.

Structure

In total there are over 1.7 Million equivalent lines of code (LoC). The 4 main directories are emul, simu, pwth, misc. The emul has all the emulation infrastructure (646 KLOC) with QEMU using over 506KLOC. The timing models are in simu (25KLOC), the power and thermal models are in pwth (92KLOC) but there are many redundant and not used power models. THe main model used is libpwrmode, libsesesctherm, and libmcpat. The libpeq may substitute libmcpat in the future, but it is still not ready. misc has miscellaneous support libraries needed to compile ESESC without needing complex Linux setup.

Instructions

To download ESESC, just type:

wget http://masc.soe.ucsc.edu/esesc/resources/esesc_v1_00.tar.bz2

A development version is also available on GitHub and can be accessed via

git clone https://github.com/masc-ucsc/esesc.git

Check other blog posts for compile and setup instructions.

In all the cases, remember to use this reference in your paper:

@INPROCEEDINGS{esesc,
author = {K. Ardestani, E. and Renau, J.},
title = { {ESESC: A Fast Multicore Simulator Using Time-Based Sampling} },
booktitle = {International Symposium on High Performance Computer Architecture},
series = {HPCA'19},
year = {2013}
}